1. Technical Field
The present disclosures relates to a system and method for controlling a communication bus. More specifically, the present disclosure relates to a system and method for controlling a communication bus using a processor controlled selector.
2. Description of the Related Art
A media system, such as a digital video recorder (DVR), may record audio/video data onto a fixed or portable storage media, for example, a hard disk or recordable optical storage media, and may reproduce audio/video data stored therein. When recording data, a DVR may receive audio/video data from an input signal, for example, a television signal, then compress and record that signal onto a storage medium. When reproducing data, a DVR may accommodate storage media, for example, a digital versatile disk (DVD), in order to access included encoded audio/video data. In certain instances, a user may wish to play back audio/video data stored on a DVD while recording an input signal onto another storage medium. Therefore, it is desirable to have a system that can provide access to multiple peripheral devices.
FIG. 3 shows the architecture of a related system including a Host Processor 100, Hard Disk 130, Optical Disk Drive 160, field programmable gate array (FPGA) 140, Encoder Processor 150, Data Buffer 155 and Advanced Technology Attachment-2 (ATA-2) bus 200.
When DVD playback is selected, the Host Processor 100 sends the appropriate ATAPI commands to the Optical Disk Drive 160 containing the DVD. The Optical Disk Drive 160 responds to those commands, accesses the DVD, and sends audio/video data to Host Processor 100 via the ATA2 bus 200. The Host Processor 100 then processes the audio/video data and outputs an audio/video signal. When the DVR records an input audio/video signal to the Hard Disk 130, the Host Processor 100 first sends commands to the Hard Disk 130 through the ATA2 bus 200. The Hard Disk 130 then receives coded data from the Encoder Processor 150, which encodes an input audio/video signal into coded data, with support of the FPGA 140 and Data Buffer 155, via ATA2 bus 200.
When the DVR plays a DVD and records an input audio/video signal simultaneously, the Hard Disk 130 and the Optical Disk Drive 160 must share the ATA2 bus 200.
The Encoder Processor 150 cooperates with a Data Buffer 155 for temporarily storing the coded data before it is transmitted to the Hard Disk 130. In order to avoid Data Buffer 155 overflow, the Host Processor 100 sends commands to Hard Disk 130 to retrieve the coded data from the Data Buffer 155.
The Optical Disk Drive 160 may take longer to execute and respond to ATAPI commands than Hard Disk 130, for example, from several hundred milliseconds to one second. According to the ATA2 standard, only one ATA2 device may communicate via the ATA2 bus at any time. In the example shown in FIG. 3, only one device may communicate with the Host Processor 100 over the ATA2 bus 200 at a time. As a result, the Optical Disk Drive 160 may communicate via the ATA2 bus 200 for a period of time such that the Host Processor 100 cannot send out the appropriate ATA2 command to the Hard Disk 130 in time to retrieve the coded data from the Encoder Processor 150 before the Data Buffer 155 overflows.
In one solution to the buffer overflow problem, known as overlapping operation, the Host Processor 100 may suspend communication with the Optical Disk Drive 160, so that it may communicate with the Hard Disk 130 while the slower Optical Disk Drive 160 executes an ATAPI command.
While the ATA2 specification includes support for overlapping operation, in practice it is supported by few Optical Disk Drives 160. According to the ATA2 specification, attached devices share the ATA2 bus. Before the Host Processor 100 communicates with a device, the Host Processor 100 sends a selection command to all attached devices identifying the device with which the Host Processor 100 intends to communicate. While all attached devices receive the command, only the selected device will respond to any following commands.
In an Optical Disk Drive 160 supporting overlapping operation, during the overlapping period, the Optical Disk Drive 160 will voluntarily release the ATA2 bus while executing a command, allowing the Host Processor 100 to communicate with other devices. The ATA2 specification includes a protocol for the Optical Disk Drive 160 to decide when to release the ATA2 bus and how to communicate with the Host Processor 100 to take back the bus in order to avoid conflict on the bus. This type of Optical Disk Drive 160 is capable of freeing the ATA2 bus while executing command without assistance of outside circuits.
Because many devices do not support overlapping operation, it is therefore desirable to provide a system and method for overlapping operation that may be used with all devices having an ATA2 interface.